Students

ELEC8870 – High Performance IC Design

2021 – Session 2, Special circumstances, North Ryde

Session 2 Learning and Teaching Update

The decision has been made to conduct study online for the remainder of Session 2 for all units WITHOUT mandatory on-campus learning activities. Exams for Session 2 will also be online where possible to do so.

This is due to the extension of the lockdown orders and to provide certainty around arrangements for the remainder of Session 2. We hope to return to campus beyond Session 2 as soon as it is safe and appropriate to do so.

Some classes/teaching activities cannot be moved online and must be taught on campus. You should already know if you are in one of these classes/teaching activities and your unit convenor will provide you with more information via iLearn. If you want to confirm, see the list of units with mandatory on-campus classes/teaching activities.

Visit the MQ COVID-19 information page for more detail.

General Information

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Unit convenor and teaching staff Unit convenor and teaching staff Senior Lecturer
Sourabh Khandelwal
sourabh.khandelwal@mq.edu.au
Contact via 9153
Room 319, 9 Wally's Walk
Mondays 12 noon to 1 pm Room 319, 9 Wally's Walk
Credit points Credit points
10
Prerequisites Prerequisites
Admission to MEngElecEng and 30cp at 3000 level or above
Corequisites Corequisites
Co-badged status Co-badged status
Unit description Unit description
From modern telecommunications to tablet computing and from mobile handsets to the cloud, the limits of integrated circuit technology are being pushed to the limits of what is possible in terms of speed, size, and power. Beyond the IC itself, packaging concerns, both electrical and thermal, provide additional constraints in the design of the modern high performance integrated circuit. This unit will be taught from the research of both resident and visiting staff as well as from the latest research around the world.

Important Academic Dates

Information about important academic dates including deadlines for withdrawing from units are available at https://www.mq.edu.au/study/calendar-of-dates

Learning Outcomes

On successful completion of this unit, you will be able to:

  • ULO1: Develop an understanding of different semiconductor technologies
  • ULO2: Develop proficiency in using standard electronic design automation (EDA) tools for IC design
  • ULO3: Perform integrated circuit (IC) design in a commercially used semiconductor technology
  • ULO4: Develop an understanding of the technical concept required for implementing various high frequency on-chip active and passive circuits
  • ULO5: Demonstrate self-learning, time-management, technical report writing, project management (individually and as a group)

General Assessment Information

In order to pass this unit a student must obtain a mark of 50 or more overall to obtain a passing grade P/ CR/ D/ HD.

The submission of lab reports and assignments will be done via iLearn. Any lates submissions will lose 5% points per day after the submission deadline. No resubmissions permitted for lab reports and assignments. Extensions depeding on circumstances may be permitted at the discretion of unit convenor.

If you receive special consideration for the final exam, a supplementary exam will be scheduled by the faculty during a supplementary exam period, typically about 3 to 4 weeks after the normal exam period. By making a special consideration application for the final exam you are declaring yourself available for a resit during the supplementary examination period and will not be eligible for a second special consideration approval based on pre-existing commitments. Please ensure you are familiar with the policy prior to submitting an application. Approved applicants will receive an individual notification one week prior to the exam with the exact date and time of their supplementary examination.

Final project presentation will be in Week 13 during laboratory hours. 

 

Assessment Tasks

Name Weighting Hurdle Due
Lab report 15% No Week 4, Week 8, Week 13
Assignment 15% No Week 3, Week 6
Lab participation 5% No Weekly lab
Design Presentation 15% No Week 13
Final examination 50% No Exam date

Lab report

Assessment Type 1: Lab report
Indicative Time on Task 2: 12 hours
Due: Week 4, Week 8, Week 13
Weighting: 15%

 

Three lab reports on design works

 
On successful completion you will be able to:
  • Develop proficiency in using standard electronic design automation (EDA) tools for IC design
  • Perform integrated circuit (IC) design in a commercially used semiconductor technology
  • Develop an understanding of the technical concept required for implementing various high frequency on-chip active and passive circuits
  • Demonstrate self-learning, time-management, technical report writing, project management (individually and as a group)

Assignment

Assessment Type 1: Problem set
Indicative Time on Task 2: 12 hours
Due: Week 3, Week 6
Weighting: 15%

 

Assignments based on lecture material

 
On successful completion you will be able to:
  • Develop an understanding of different semiconductor technologies
  • Develop proficiency in using standard electronic design automation (EDA) tools for IC design
  • Perform integrated circuit (IC) design in a commercially used semiconductor technology
  • Develop an understanding of the technical concept required for implementing various high frequency on-chip active and passive circuits

Lab participation

Assessment Type 1: Design Task
Indicative Time on Task 2: 0 hours
Due: Weekly lab
Weighting: 5%

 

Active and passive circuit implementation in the practical activities. Participation workload is assumed to take place inside the schedule teaching activity.

 
On successful completion you will be able to:
  • Develop proficiency in using standard electronic design automation (EDA) tools for IC design
  • Perform integrated circuit (IC) design in a commercially used semiconductor technology
  • Demonstrate self-learning, time-management, technical report writing, project management (individually and as a group)

Design Presentation

Assessment Type 1: Presentation
Indicative Time on Task 2: 12 hours
Due: Week 13
Weighting: 15%

 

Powerpoint or other suitable format presentation on the final design task.

 
On successful completion you will be able to:
  • Develop proficiency in using standard electronic design automation (EDA) tools for IC design
  • Perform integrated circuit (IC) design in a commercially used semiconductor technology
  • Develop an understanding of the technical concept required for implementing various high frequency on-chip active and passive circuits
  • Demonstrate self-learning, time-management, technical report writing, project management (individually and as a group)

Final examination

Assessment Type 1: Examination
Indicative Time on Task 2: 49 hours
Due: Exam date
Weighting: 50%

 

Final examination held in the formal exam period.

 
On successful completion you will be able to:
  • Develop an understanding of different semiconductor technologies
  • Develop an understanding of the technical concept required for implementing various high frequency on-chip active and passive circuits
  • Demonstrate self-learning, time-management, technical report writing, project management (individually and as a group)

1 If you need help with your assignment, please contact:

  • the academic teaching staff in your unit for guidance in understanding or completing this type of assessment
  • the Writing Centre for academic skills support.

2 Indicative time-on-task is an estimate of the time required for completion of the assessment task and is subject to individual variation

Delivery and Resources

Industry standard CAD tool Microwave Office will be used for design project and laboratory excercises. Students will be provided with details on how to access this tool.

 

Unit Schedule

Refer to iLearn and lecture notes for the lecture schedule.

There will be practical during week-1. The first week laboratory will get students oriented to the CAD tool which will be used in this unit.

Policies and Procedures

Macquarie University policies and procedures are accessible from Policy Central (https://policies.mq.edu.au). Students should be aware of the following policies in particular with regard to Learning and Teaching:

Students seeking more policy resources can visit Student Policies (https://students.mq.edu.au/support/study/policies). It is your one-stop-shop for the key policies you need to know about throughout your undergraduate student journey.

To find other policies relating to Teaching and Learning, visit Policy Central (https://policies.mq.edu.au) and use the search tool.

Student Code of Conduct

Macquarie University students have a responsibility to be familiar with the Student Code of Conduct: https://students.mq.edu.au/admin/other-resources/student-conduct

Results

Results published on platform other than eStudent, (eg. iLearn, Coursera etc.) or released directly by your Unit Convenor, are not confirmed as they are subject to final approval by the University. Once approved, final results will be sent to your student email address and will be made available in eStudent. For more information visit ask.mq.edu.au or if you are a Global MBA student contact globalmba.support@mq.edu.au

Student Support

Macquarie University provides a range of support services for students. For details, visit http://students.mq.edu.au/support/

Learning Skills

Learning Skills (mq.edu.au/learningskills) provides academic writing resources and study strategies to help you improve your marks and take control of your study.

The Library provides online and face to face support to help you find and use relevant information resources. 

Student Services and Support

Students with a disability are encouraged to contact the Disability Service who can provide appropriate help with any issues that arise during their studies.

Student Enquiries

For all student enquiries, visit Student Connect at ask.mq.edu.au

If you are a Global MBA student contact globalmba.support@mq.edu.au

IT Help

For help with University computer systems and technology, visit http://www.mq.edu.au/about_us/offices_and_units/information_technology/help/. 

When using the University's IT, you must adhere to the Acceptable Use of IT Resources Policy. The policy applies to all who connect to the MQ network including students.

Changes from Previous Offering

Based on student feedback, the laboratory excercises in the initial weeks have been modified so that they cover main parts of building the final design project.

 

ALTUM RF BEST STUDENT PRIZE

ALTUM RF (https://www.altumrf.com/) will award the top student of this unit during week 13 fianl project presentation session.

Top student is the student with highest marks in the unit by week-13. Final exam marks are not included for Altum RF award.

The award amount is 250$. The award may be shared between multiple students is top students have eual marks. 

Changes in Response to Student Feedback

Based on student feedback, the laboratory excercises in the initial weeks have been modified so that they cover main parts of building the final design project.