|Unit convenor and teaching staff||
Unit convenor and teaching staff
Rex Di Bona
Contact via via email
50 Waterloo Road
Contact via via email
50 Waterloo Road
COMP115 or COMP1000
This unit aims to provide students with an understanding of, and fluency in, combinational and sequential logic design techniques commonly used in the design of large-scale digital systems, as well as exposure to hardware description languages. Students will apply this knowledge to the design and implementation of digital circuits and systems at the gate level, and also program field programmable gate arrays.
Information about important academic dates including deadlines for withdrawing from units are available at https://www.mq.edu.au/study/calendar-of-dates
On successful completion of this unit, you will be able to:
Grading and passing requirement for unit
In order to pass this unit a student must obtain a mark of 50 or more for the unit (i.e. obtain a passing grade P/ CR/ D/ HD).
For further details about grading, please refer below in the policies and procedures section.
If you receive special consideration for the final exam, a supplementary exam will be scheduled in the supplementary examination period, typically about 3 to 4 weeks after the normal exam period. By making a special consideration application for the final exam you are declaring yourself available for a resit during the supplementary examination period and will not be eligible for a second special consideration approval based on pre-existing commitments. Please ensure you are familiar with the policy prior to submitting an application. Approved applicants will receive an individual notification one week prior to the exam with the exact date and time of their supplementary examination.
There are two hurdle requirements for passing this unit. The final examination is a hurdle requirement. A grade of 50% or more in the final examination is a condition of passing this unit. If you are given a second opportunity to sit the final examination as a result of failing to meet the minimum mark required, you will be offered that chance during the supplementary examination period and will be notified of the exact day and time after the publication of final results for the unit. The second attempt at a hurdle assessment is graded as pass fail. The maximum grade for a second attempt is the hurdle threshold grade.
Participation in practical sessions is a hurdle requirement and students are required to participate in at least 10/13 practical sessions to pass this unit
Late submissions and Resubmissions
Late submissions will attract a penalty of 20 marks per day. Extenuating circumstances will be considered upon lodgement of a formal notice of request for Special Consideration.
Resubmissions of work is not allowed.
|Final Exam||50%||Yes||During Exam Period|
|Simple Design Task||10%||No||Week 7|
|Student Engagement||10%||Yes||Each Week|
|Complex Design Task||30%||No||Week 13|
Assessment Type 1: Examination
Indicative Time on Task 2: 19 hours
Due: During Exam Period
This is a hurdle assessment task (see assessment policy for more information on hurdle assessment tasks)
There is a formal examination of the material covered in the pre-work, laboratory work, and lecture material presented during the unit. This is a hurdle assessment. You must pass the exam to be eligible to pass the unit. The exam is scheduled to last three hours.
This is the first design assignment. You will take the knowledge about digital circuits presented so far and design a circuit to perform a given task.
Students are expected to actively participate in the learning activities with a developing level of independence. Before each practical session students may be required to complete preparatory work in a log book. During the practical sessions students must also complete their work and keep a log book of their work.
In pure online versions of the class the work will be conducted using a simulator and the results will need to be submitted for assessment each week.
This assignment is a design assignment. You must design and present a state machine to solve the project outline given. A rubric will be issued to indicate what is being looked for in the assignment.
1 If you need help with your assignment, please contact:
2 Indicative time-on-task is an estimate of the time required for completion of the assessment task and is subject to individual variation
This is a hands on unit, centred about physical circuits. We will be using physical trainer boards to build digital circuits and experiment with those circuits. All students are expected to attend their practical session on Campus.
The text book is an electronics book, available free of charge to all students through the library.
Macquarie University policies and procedures are accessible from Policy Central (https://policies.mq.edu.au). Students should be aware of the following policies in particular with regard to Learning and Teaching:
Students seeking more policy resources can visit Student Policies (https://students.mq.edu.au/support/study/policies). It is your one-stop-shop for the key policies you need to know about throughout your undergraduate student journey.
Macquarie University students have a responsibility to be familiar with the Student Code of Conduct: https://students.mq.edu.au/admin/other-resources/student-conduct
Results published on platform other than eStudent, (eg. iLearn, Coursera etc.) or released directly by your Unit Convenor, are not confirmed as they are subject to final approval by the University. Once approved, final results will be sent to your student email address and will be made available in eStudent. For more information visit ask.mq.edu.au or if you are a Global MBA student contact email@example.com
Macquarie University provides a range of support services for students. For details, visit http://students.mq.edu.au/support/
Learning Skills (mq.edu.au/learningskills) provides academic writing resources and study strategies to help you improve your marks and take control of your study.
The Library provides online and face to face support to help you find and use relevant information resources.
Students with a disability are encouraged to contact the Disability Service who can provide appropriate help with any issues that arise during their studies.
For all student enquiries, visit Student Connect at ask.mq.edu.au
If you are a Global MBA student contact firstname.lastname@example.org
For help with University computer systems and technology, visit http://www.mq.edu.au/about_us/offices_and_units/information_technology/help/.
When using the University's IT, you must adhere to the Acceptable Use of IT Resources Policy. The policy applies to all who connect to the MQ network including students.
in this offering the programmable GAL hardware component is replaced by FPGAs as the modern replacement.